VeriComm V4.0 新版本釋出

 功能新增:

1. FPGA HDL Ximulation for VHDL (Internal Signal Debugger) new release.(VeriComm Pro only)

2.test-bench input for VHDL.(VeriComm Pro only)

3.Oscilloscope for Data Processes.

4.FPGA HDL Ximulation for Verilog (Internal Signal Debugger) bug-fixed.(VeriComm Pro only)

5.VeriComm Pro/VeriComm bug-fixed.

並新增SMIMS Utility tools, 共有以下工具:

1.Ascii2MIF : Convert ASCII file to MIF(ISE/Quartus II memory initialization file).

2.HDLAutoAssign : Auto create a ucf file for Xilinx ISE or qsf file for Altera Quartus.

3.ImageToBitmapText : Convert all type of image to bitmap text file. The text file can be VeriComm wave form input file

4.SMIMSVITool :  This tool can capture Webcam video frame, and display RGB data.