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Friday, 30 July 2010
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VeriComm V4.0 Released
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VeriComm V4.0 Released

 New feature:

1.FPGA HDL Ximulation for VHDL (Internal Signal Debugger) new release.(VeriComm Pro only)

2.Test-bench input for VHDL.(VeriComm Pro only)

3.Oscilloscope for Data Processes.

4.FPGA HDL Ximulation for Verilog bug-fixed.(VeriComm Pro only)

5.VeriComm Pro/VeriComm bug-fixed.

New SMIMS tools:

1.Ascii2MIF : Convert ASCII file to MIF(ISE/Quartus II memory initialization file).

2.HDLAutoAssign : Auto create a ucf file for Xilinx ISE or qsf file for Altera Quartus.

3.ImageToBitmapText : Convert all type of image to bitmap text file. The text file can be VeriComm wave form input file

4.SMIMSVITool :  This tool can capture Webcam video frame, and display RGB data.

 
 
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